1. Field of the Invention
The present invention relates to a display device and a method of fabricating a display device, and in particular to a liquid crystal display device and a method of fabricating a liquid crystal display device.
2. Description of the Related Art
In display devices, particularly, in flat panel display devices, such as liquid crystal display devices, active devices, such as a thin film transistors (TFTs) are arranged within pixel regions to drive the display device using an active matrix driving method. In the active matrix driving method, the active devices are disposed within each pixel region and are arranged in a matrix configuration to drive corresponding pixels.
FIG. 1 is a plan view a liquid crystal display device according to the related art. In FIG. 1, a liquid crystal display device 1 includes an N×M-number of pixels arranged along horizontal and vertical directions, wherein each pixel includes a TFT 10 formed at a cross region of a gate line 3 for receiving a scan signal from an external driving circuit and a data line 5 for receiving an image signal. The TFT 10 includes a gate electrode 12 connected to the gate line 3, a semiconductor layer 14 on the gate electrode 12 that is activated by the scan signal supplied to the gate electrode 12, and a source electrode 16 and a drain electrode 17 on the semiconductor layer 14. A pixel electrode 28 is formed within a display portion of the pixel region, and is connected to the drain electrode 17 to supply the image signal to a liquid crystal material layer (not shown). In addition, a storage capacitor metal layer 7 is formed to overlap the gate line 3 and is arranged along the horizontal direction of the gate line 3 to provide a storage capacitance for the liquid crystal display device 1.
FIG. 2 is a cross sectional view along I-I′ of FIG. 1 according to the related art. In FIG. 2, the gate electrode 12 of the TFT 10 (in FIG. 1) and the gate line 3 are disposed on a first substrate 20, which is made of a transparent insulating material, such as glass, and a gate insulating layer 22 is deposited over an entire surface of the first substrate 20. The semiconductor layer 14 is formed on the gate insulating layer 22, and the source electrode 16 and the drain electrode 17 are formed thereon to form the TFT 10 (in FIG. 1). In addition, the storage capacitor metal layer 7 is disposed on the gate insulating layer 22 so that the gate insulating layer 22 is sandwiched between the storage capacitor metal layer 7 and the gate line 3 to create the storage capacitance.
A passivation layer 24 is deposited over an entire surface of the first substrate 20, and the pixel electrode 27, which is made of a transparent electrode, such as indium tin oxide (ITO), is formed on the passivation layer 24. In addition, a contact hole 27 is formed in the passivation layer 24 to electrically interconnect the drain electrode 17 of the TFT 10 (in FIG. 1) and the pixel electrode 28.
In FIG. 2, a black matrix 32 and a color filter layer 34 are formed on a second substrate 30. The black matrix 32 is formed within a portion the TFT 10 (in FIG. 1), and a portion of the black matrix 32 is formed between adjacent pixels (i.e., the gate line 3 and regions of the data line 5) to block light within regions where liquid crystal molecules of the liquid crystal material layer 40 are not activated, i.e., non-display regions. The color filter layer 34 includes red (R), blue (B), and green (G) color filter elements.
In general, the storage capacitance of the liquid crystal display device 1 improves sustaining characteristics of the voltage supplied to liquid crystal material layer 40, thereby stabilizing gray levels and reducing flicker and generation of residual images. Accordingly, storage capacitance of the liquid crystal display device is considered very important. In FIG. 2, the gate insulating layer 22 is sandwiched between overlapping portions of the gate line 3 and the metal layer 7, thereby creating the storage capacitance. Accordingly, an amount of the storage capacitance can be controlled by adjusting the area, i.e., width and length of the metal layer 7, of overlap between the gate line 3 and the metal layer 7.
With the advent of high resolution-liquid crystal display devices applicable of displaying high picture quality images, such as the high definition TVs (HDTVs), a size of each pixel should be very small. However, the overlap between the metal layer 7 and the gate line 3 is limited so as not to be greater than a set length. Accordingly, the overlap region of the gate line 3 and the metal layer 7 may be limited.
In order to generate sufficient amounts of the storage capacitance, the overlap region between the gate line 3 and the metal layer 7 is increased by increasing the widths of the gate line 3 and the metal layer 7 (since the length of the metal layer 7 is limited). Alternatively, an additional storage capacitance is created by forming two storage capacitor metal layers at other regions of a pixel (i.e., a central region of a pixel) to overlap with the gate line 3 even with the gate insulating layer remaining therebetween. However, increasing the width of the gate line 3 or forming the second metal layer reduces aperture ratio.